Embodiments of the present invention relate to data processing in a processor-based system, and more particularly to executing processor operations transparently to an operating system (OS).
Systems are typically formed of hardware and software components. Typical hardware includes a processor and related circuitry, including chipsets, memories, input/output (I/O) devices and the like. Software components typically include an OS and basic input/output system (BIOS) programs, low-level drivers, and higher-level applications such as user-level applications for performing desired tasks, such as word processing, database processing, scientific computing and the like.
Generally, the OS is the primary scheduler of activities on the system and is fully aware of various processes being executed on the processor. As a result, when additional features or extensions are added to hardware such as the processor, OS support is required in the way of drivers or other software so that the OS can monitor execution of the enhanced hardware. When additional processor features or extensions are to be visible to each process being executed on the processor, the OS may choose to virtualize the feature or extension, such that each process perceives that it has its own private access or copy of the feature or extension.
Upon initiation of a process, the OS provides a process control block (PCB), which is a structure to represent the process in a privileged level of memory (i.e., inaccessible to user-level applications). The PCB may include various information regarding the executing process, such as identification information, state information, register values, memory information, and other such information. Providing such information and maintaining coherency between this information in the processor and the process control block maintained by the OS is a cumbersome and performance sensitive activity.
When certain instructions are added to an instruction set architecture (ISA) additional, extended state may be available in a processor. Further when enhancements to hardware (e.g., processor hardware such as registers and the like) are incorporated, OS support is needed. This support may be in the form of drivers for current OS, or new OS service packs, and future OS versions may include additional code to support the enhancements. Also, additional storage space in a PCB or other OS data structure is needed whenever a new feature is added to a processor.
These extensions can also cause a performance impact on various activities, such as a context switch between two processes. If the additional state due to these extensions is unlikely to be used frequently by most processes, the OS may implement so-called lazy save and restore mechanisms which can be used to postpone and sometimes eliminate the context switches of the additional state due to these extensions, thus saving time. However, in a multiprocessor system, such as a symmetric multiprocessor (SMP) system, these mechanisms are more cumbersome, and typically an OS will instead perform a full state save upon a context switch, which can be a relatively expensive process. Such saves both implicate the OS and are inefficient.
Accordingly, a need exists for an improved manner of implementing enhancements to hardware such as processor extensions.